0cd85e4adf
The intel intrinsics (including SSE) are only included in the header if
the arch is x86_64 which made the i686 build fail.
Closes: https://gitlab.gnome.org/GNOME/mutter/-/issues/3234
Fixes: 568506ecb
("cogl: Add half float implementation")
Part-of: <https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/3499>
272 lines
7.3 KiB
C
272 lines
7.3 KiB
C
/*
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* Mesa 3-D graphics library
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*
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* Copyright (C) 1999-2007 Brian Paul All Rights Reserved.
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* Copyright 2015 Philip Taylor <philip@zaynar.co.uk>
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* Copyright 2018 Advanced Micro Devices, Inc.
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* Copyright (C) 2018-2019 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/* This file comes from half_float.c in mesa. */
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#include "config.h"
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#include <math.h>
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#if defined(__SSE__) || \
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(defined(_M_IX86_FP) && (_M_IX86_FP >= 1)) || \
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(defined(_M_X64) && !defined(_M_ARM64EC))
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#include <xmmintrin.h>
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#include <emmintrin.h>
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#endif
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#include "cogl/cogl-half-float.h"
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#include "cogl/cogl-soft-float.h"
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typedef union
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{
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float f;
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int32_t i;
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uint32_t u;
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} FloatInt;
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/**
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* \brief Rounds \c x to the nearest integer, with ties to the even integer,
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* and returns the value as a long int.
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*/
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static inline long
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cogl_lroundevenf (float x)
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{
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#if defined(__SSE__) || \
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(defined(_M_IX86_FP) && (_M_IX86_FP >= 1)) || \
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(defined(_M_X64) && !defined(_M_ARM64EC))
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#if LONG_MAX == INT64_MAX
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return _mm_cvtss_si64 (_mm_load_ss (&x));
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#elif LONG_MAX == INT32_MAX
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return _mm_cvtss_si32 (_mm_load_ss (&x));
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#else
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#error "Unsupported long size"
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#endif
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#else
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return lrintf (x);
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#endif
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}
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/**
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* Convert a 4-byte float to a 2-byte half float.
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*
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* Not all float32 values can be represented exactly as a float16 value. We
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* round such intermediate float32 values to the nearest float16. When the
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* float32 lies exactly between to float16 values, we round to the one with
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* an even mantissa.
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*
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* This rounding behavior has several benefits:
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* - It has no sign bias.
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*
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* - It reproduces the behavior of real hardware: opcode F32TO16 in Intel's
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* GPU ISA.
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*
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* - By reproducing the behavior of the GPU (at least on Intel hardware),
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* compile-time evaluation of constant packHalf2x16 GLSL expressions will
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* result in the same value as if the expression were executed on the GPU.
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*/
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uint16_t
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cogl_float_to_half_slow (float val)
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{
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const FloatInt fi = {val};
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const int flt_m = fi.i & 0x7fffff;
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const int flt_e = (fi.i >> 23) & 0xff;
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const int flt_s = (fi.i >> 31) & 0x1;
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int s, e, m = 0;
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uint16_t result;
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/* sign bit */
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s = flt_s;
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/* handle special cases */
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if ((flt_e == 0) && (flt_m == 0))
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{
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/* zero */
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/* m = 0; - already set */
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e = 0;
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}
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else if ((flt_e == 0) && (flt_m != 0))
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{
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/* denorm -- denorm float maps to 0 half */
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/* m = 0; - already set */
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e = 0;
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}
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else if ((flt_e == 0xff) && (flt_m == 0))
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{
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/* infinity */
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/* m = 0; - already set */
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e = 31;
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}
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else if ((flt_e == 0xff) && (flt_m != 0))
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{
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/* Retain the top bits of a NaN to make sure that the quiet/signaling
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* status stays the same.
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*/
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m = flt_m >> 13;
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if (!m)
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m = 1;
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e = 31;
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}
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else {
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/* regular number */
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const int new_exp = flt_e - 127;
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if (new_exp < -14)
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{
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/* The float32 lies in the range (0.0, min_normal16) and is rounded
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* to a nearby float16 value. The result will be either zero, subnormal,
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* or normal.
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*/
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e = 0;
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m = cogl_lroundevenf ((1 << 24) * fabsf (fi.f));
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}
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else if (new_exp > 15)
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{
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/* map this value to infinity */
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/* m = 0; - already set */
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e = 31;
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}
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else {
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/* The float32 lies in the range
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* [min_normal16, max_normal16 + max_step16)
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* and is rounded to a nearby float16 value. The result will be
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* either normal or infinite.
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*/
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e = new_exp + 15;
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m = cogl_lroundevenf (flt_m / (float) (1 << 13));
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}
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}
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g_assert (0 <= m && m <= 1024);
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if (m == 1024)
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{
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/* The float32 was rounded upwards into the range of the next exponent,
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* so bump the exponent. This correctly handles the case where f32
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* should be rounded up to float16 infinity.
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*/
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++e;
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m = 0;
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}
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result = (s << 15) | (e << 10) | m;
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return result;
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}
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uint16_t
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cogl_float_to_float16_rtz_slow (float val)
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{
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return cogl_float_to_half_rtz_slow (val);
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}
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/**
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* Convert a 2-byte half float to a 4-byte float.
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* Based on code from:
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* http://www.opengl.org/discussion_boards/ubb/Forum3/HTML/008786.html
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*/
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float
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cogl_half_to_float_slow (uint16_t val)
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{
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FloatInt infnan;
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FloatInt magic;
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FloatInt f32;
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infnan.u = 0x8f << 23;
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infnan.f = 65536.0f;
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magic.u = 0xef << 23;
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/* Exponent / Mantissa */
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f32.u = (val & 0x7fff) << 13;
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/* Adjust */
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f32.f *= magic.f;
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/* XXX: The magic mul relies on denorms being available */
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/* Inf / NaN */
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if (f32.f >= infnan.f)
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f32.u |= 0xff << 23;
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/* Sign */
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f32.u |= (uint32_t)(val & 0x8000) << 16;
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return f32.f;
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}
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/**
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* Convert 0.0 to 0x00, 1.0 to 0xff.
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* Values outside the range [0.0, 1.0] will give undefined results.
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*/
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uint8_t cogl_half_to_unorm8 (uint16_t val)
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{
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const int m = val & 0x3ff;
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const int e = (val >> 10) & 0x1f;
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const int s = (val >> 15) & 0x1;
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/* v = round_to_nearest (1.mmmmmmmmmm * 2^(e-15) * 255)
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* = round_to_nearest ((1.mmmmmmmmmm * 255) * 2^(e-15))
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* = round_to_nearest ((1mmmmmmmmmm * 255) * 2^(e-25))
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* = round_to_zero ((1mmmmmmmmmm * 255) * 2^(e-25) + 0.5)
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* = round_to_zero (((1mmmmmmmmmm * 255) * 2^(e-24) + 1) / 2)
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*
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* This happens to give the correct answer for zero/subnormals too
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*/
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g_assert (s == 0 && val <= FP16_ONE); /* check 0 <= this <= 1 */
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/* (implies e <= 15, which means the bit-shifts below are safe) */
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uint32_t v = ((1 << 10) | m) * 255;
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v = ((v >> (24 - e)) + 1) >> 1;
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return v;
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}
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/**
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* Takes a uint16_t, divides by 65536, converts the infinite-precision
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* result to fp16 with round-to-zero. Used by the ASTC decoder.
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*/
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uint16_t cogl_uint16_div_64k_to_half (uint16_t v)
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{
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/* Zero or subnormal. Set the mantissa to (v << 8) and return. */
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if (v < 4)
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return v << 8;
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/* Count the leading 0s in the uint16_t */
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int n = __builtin_clz (v) - 16;
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/* Shift the mantissa up so bit 16 is the hidden 1 bit,
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* mask it off, then shift back down to 10 bits
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*/
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int m = (((uint32_t)v << (n + 1)) & 0xffff ) >> 6;
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/* (0{n} 1 X{15-n}) * 2^-16
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* = 1.X * 2^(15-n-16)
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* = 1.X * 2^(14-n - 15)
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* which is the FP16 form with e = 14 - n
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*/
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int e = 14 - n;
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g_assert (e >= 1 && e <= 30);
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g_assert (m >= 0 && m < 0x400);
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return (e << 10) | m;
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}
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