57 lines
2.2 KiB
Diff
57 lines
2.2 KiB
Diff
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From 2c05b4072f982df8002d61327837e18a724e934f Mon Sep 17 00:00:00 2001
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From: Alexandru-Cezar Sardan <alexandru.sardan@freescale.com>
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Date: Wed, 5 Feb 2014 16:52:31 +0200
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Subject: [PATCH 28/47] Enable SPE & AltiVec generation on powepc*linux target
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When is configured with --target=powerpc-linux, the resulting GCC will
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not be able to generate code for SPE targets (e500v1/v2).
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GCC configured with --target=powerpc-linuxspe will not be able to
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generate AltiVec instructions (for e6500).
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This patch modifies the configured file such that SPE or AltiVec code
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can be generated when gcc is configured with --target=powerpc-linux.
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The ABI and speciffic instructions can be selected through the
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"-mabi=spe or -mabi=altivec" and the "-mspe or -maltivec" parameters.
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Upstream-Status: Inappropriate [configuration]
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Signed-off-by: Alexandru-Cezar Sardan <alexandru.sardan@freescale.com>
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---
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gcc/config.gcc | 9 ++++++++-
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gcc/config/rs6000/linuxspe.h | 3 ---
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2 files changed, 8 insertions(+), 4 deletions(-)
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diff --git a/gcc/config.gcc b/gcc/config.gcc
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index 5e45f4b5199..9b381dfd9af 100644
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--- a/gcc/config.gcc
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+++ b/gcc/config.gcc
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@@ -2415,7 +2415,14 @@ powerpc-*-rtems*)
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tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-rtems rs6000/t-ppccomm"
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;;
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powerpc*-*-linux*)
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- tm_file="${tm_file} dbxelf.h elfos.h gnu-user.h freebsd-spec.h rs6000/sysv4.h"
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+ case ${target} in
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+ powerpc*-*-linux*spe* | powerpc*-*-linux*altivec*)
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+ tm_file="${tm_file} dbxelf.h elfos.h gnu-user.h freebsd-spec.h rs6000/sysv4.h"
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+ ;;
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+ *)
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+ tm_file="${tm_file} dbxelf.h elfos.h gnu-user.h freebsd-spec.h rs6000/sysv4.h rs6000/linuxaltivec.h rs6000/linuxspe.h rs6000/e500.h"
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+ ;;
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+ esac
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extra_options="${extra_options} rs6000/sysv4.opt"
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tmake_file="${tmake_file} rs6000/t-fprules rs6000/t-ppccomm"
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extra_objs="$extra_objs rs6000-linux.o"
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diff --git a/gcc/config/rs6000/linuxspe.h b/gcc/config/rs6000/linuxspe.h
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index 92efabfe664..6d486451a7e 100644
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--- a/gcc/config/rs6000/linuxspe.h
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+++ b/gcc/config/rs6000/linuxspe.h
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@@ -27,6 +27,3 @@
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#undef TARGET_DEFAULT
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#define TARGET_DEFAULT MASK_STRICT_ALIGN
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#endif
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-
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-#undef ASM_DEFAULT_SPEC
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-#define ASM_DEFAULT_SPEC "-mppc -mspe -me500"
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--
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2.12.2
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